Data General Nova | 1969 ~ 1981

Data General Nova

Data General Nova was a series of 16-bit minicomputers released by Data General Corporation in the late 1960s, which became very popular in the 1970s. The Nova series sold tens of thousands of units and was widely used in various scientific laboratories.

The first model, "Nova," was released in 1969 and was packaged in a single 3U rack-mount case. This model had enough computing power to handle simple tasks and was recognized for its performance in many scientific laboratories. Subsequently, in 1970, the "Supernova" was released, boasting speeds about four times faster than the Nova and reigning as the fastest minicomputer for several years.

Launched during a period of rapid advancement in integrated circuit (microchip) design, the Nova underwent several upgrades over the next five years. As a result, models 800, 1200, Nova 2, Nova 3, and finally Nova 4 were introduced in succession. In 1977, a single-chip implementation model called MicroNova was also released, but it did not gain widespread use as the market shifted towards new microprocessor designs. Additionally, that same year, Fairchild Semiconductor released the Fairchild 9440, a microprocessor version of the Nova, but it also failed to gain significant popularity.

The Nova line was eventually replaced by Data General's Eclipse series, which maintained most of the features while adding virtual memory support and other functionalities required by modern operating systems. By the 1980s, the Eclipse MV series emerged as a 32-bit upgraded version.

Edson de Castro was the product manager for Digital Equipment Corporation's (DEC) innovative PDP-8, which is widely known as "the first true minicomputer" and was composed of 12 bits. He also led the design of the upgraded PDP-8/I, which used early integrated circuits instead of individual transistors.

During the development of the PDP-8/I, de Castro visited circuit board manufacturers and learned that the complexity of the circuit boards they could assemble was rapidly advancing. He concluded that the PDP-8/I could be produced through fully automated assembly on large boards, something that had been impossible just a year prior. However, within DEC, there was a familiarity with the small boards used by previous machines, and there were concerns that tracking problems would be difficult if many components were mounted on a single board. Ultimately, it was decided to continue using small boards while slightly improving board density with a new "flip-chip" packaging.

At the time the PDP-8 was being developed, the introduction of ASCII and a major update in 1967 led to a new generation of designs operating in 8-bit units. This prompted DEC to transition to mid-range designs operating in 16-bit units instead of the previously used 12-bit and 18-bit lineups. De Castro was confident that it was possible to implement a 16-bit minicomputer CPU on a single 15-inch square board.

In 1967, de Castro began work on a new design called "PDP-X." This design included several progressive features, such as a single design capable of building 8-bit, 16-bit, and 32-bit platforms. The project evolved into several detailed architecture documents, but ultimately DEC's founder, Ken Olsen, opposed the project, arguing that PDP-X did not offer sufficient advantages over the 12-bit PDP-8 and the 18-bit PDP-9 systems. As a result, PDP-X was canceled in the spring of 1968.

The cancellation of PDP-X led de Castro to decide to leave DEC and create his own system. He was not alone. At the end of 1967, like-minded engineers gathered to design a new machine. This group included department head Pat Green, hardware engineer Richard Soji, and software engineer Henry Burkhardt III. Unlike PDP-X, this new effort focused on a single machine that could be quickly brought to market, as de Castro felt the PDP-X concept was too ambitious for a small startup.

While discussing with others at DEC, the initial concept led to a cost-effective 8-bit machine. The group began contacting Herbert Richman, a salesman from Fairchild Semiconductor, who had connections with DEC. At the time, Fairchild was rapidly growing in the TTL market, competing with Texas Instruments and Signetics, and was introducing new fabs that enabled more complex designs. Fairchild's latest 9300 series allowed up to 96 gates per chip, which could be used to implement 4-bit chips like binary counters and shift registers.

Using these ICs reduced the total number of ICs needed to implement the arithmetic logic unit (ALU), a core mathematical component of the CPU, allowing for an expansion from an 8-bit design to a 16-bit one. To achieve this, the CPU was expanded from a single printed circuit board measuring 15x15 inches (38cm x 38cm) to two boards, but this design still provided a more powerful and cost-effective ASCII-based system than the 8/I. A third board handled input/output circuits, and another board typically included 4KB of random access memory. The entire four-card system fit into a single rack-mount chassis.

The boards were designed to connect with minimal manual wiring, allowing all boards to be assembled in an automated manner. This approach significantly reduced costs compared to the 8/I, which had many small boards that required wiring between them using wire wrap. The larger board configuration of the Nova increased reliability, making it particularly popular in industrial or laboratory environments.

The new design employed a simple load-store architecture, a structure that would re-emerge in 1980s RISC designs. As the complexity of flip-flops rapidly decreased, they could be implemented in chips, which might have made the addressing modes of the load-store design feel inadequate. However, this was compensated for by adding four general-purpose registers instead of a single register, which could be found in similar low-cost systems.

At the end of 1967, Herbert Richman introduced the group to Fred Adler, a lawyer based in New York. Adler began seeking various funding sources for initial capital. By 1968, Adler had secured a major funding agreement with a consortium of venture capital funds in the Boston area, which provided an initial investment of $400,000 and agreed to provide an additional $400,000 for production expansion. De Castro, Burkhardt, and Soji left DEC and founded Data General (DG) on April 15, 1968. Green did not join, believing the venture was too risky, and Richman joined later, after the product was released.

Work on the first system took about nine months, and the first sales activities began in November of that year. Fortunately, the computer conference that fall was postponed to December, allowing them to bring a working system to San Francisco to demonstrate a version of Spacewar! DG officially launched the Nova in 1969, advertising it at a base price of $3,995 (equivalent to $33,193 in 2023) and marketing it as "the world's best small computer." The basic model was not immediately useful, and adding 8kW (16kB) of RAM raised the price to around $7,995. In contrast, the 8/I model was priced at $12,800 with 4kW (6kB).

The first sale was made to a university in Texas, and the team manually produced the first example, which was shipped in February. However, due to a strike at the airline, the machine did not arrive. They sent a second example, which arrived on time after the strike ended. The original machine was eventually delivered in May.

The system was successful from the outset, selling 100 units within six months and 500 units within 15 months. Sales accelerated with the release of new versions, and by 1975, the company's annual revenue reached $100 million.

Ken Olsen publicly predicted that DG would fail, but after the launch of the Nova, that prediction proved incorrect. At that point, several other companies were also planning to release 16-bit designs. Olsen believed that these 16-bit designs would threaten not only DEC's 18-bit line but also its 12-bit line, prompting him to start a new 16-bit design. This design emerged as the PDP-11 in 1970, featuring a much more complex design that differentiated it from the Nova. The two designs competed fiercely in the market.

Rumors about the PDP-11 reached DG shortly after the Nova began shipping, and in the spring of 1970, DG hired a new designer, Larry Seligman, to begin work on creating a better machine. There were two major changes following the Nova design. The first was the introduction of the 8260, a 4-bit IC by Signetics, which combined addition, XNOR, and AND operations, reducing the number of chips needed to implement basic logic by about three times. The second was Intel's active promotion of semiconductor-based memory, announcing that a single chip could hold 1024 bits and operate at much higher speeds than core memory.

Seligman's new design leveraged both of these improvements. The new ICs allowed the ALU to be expanded to 16-bit width on the same two cards, enabling mathematical and logical operations to be processed in a single cycle. As a result, the new design could operate four times faster than the original Nova. Additionally, the use of new smaller core memory improved cycle time from 1,200ns to 800ns, enhancing performance by one-third. Performance improved even further when the core was replaced with read-only memory, as the absence of read-write cycles allowed for access times of 300ns, dramatically enhancing performance.

The resulting product, Supernova, was released in 1970. The initial model still used core memory, but the entire design was developed with the assumption that faster semiconductor memory would be used. Later that same year, the Supernova SC was released, which adopted semiconductor (SC) memory. This much higher performance memory allowed the CPU to synchronize with memory at a cycle time of 300ns (3.3MHz), further increasing speed. It became the fastest minicomputer for several years. However, initially, the new memory was very expensive and generated a lot of heat, so it was not widely used.

In 1968, Fairchild prototyped a single-chip 4-bit ALU called 4711 through its micro-matrix gate array technology. This design was not intended for mass production and was very costly to produce. However, the situation changed when Signetics announced the 8260 in 1969. In 1970, Texas Instruments and Fairchild each released 4-bit ALUs called 74181 and 9341, respectively, which provided all the common logic functions and significantly reduced the number of chips needed.

As a result, Data General began considering new CPU designs using highly integrated ICs. At the very least, this led to the idea of shrinking the CPU down to a single card. The new concept allowed both the basic Nova and Supernova to be hosted in a single chassis, enabling customers to purchase a low-cost system and upgrade it at any time by replacing only the CPU circuit board.

While Seligman was working on the Supernova design, the company received a letter from a person named Ron Gruner stating, "I have read about your products. I have seen your advertisements. I will work for you. And I will come to your office in a week to discuss this matter." Gruner was immediately hired and tasked with developing a low-cost machine, while Seligman was to design a high-performance version.

Gruner's low-cost model was released in 1970 as the Nova 1200. The 1200 was essentially a reconfigured version of the original Nova, using the same 1,200ns core memory. Seligman released the 4-ALU Supernova as the Nova 800 in 1971. However, the higher-performing model having a lower number led to a somewhat confusing naming convention. The two models had various case options, including the 1200 with seven slots, the 1210 with four slots, and the 1220 with fourteen slots.

At that point, the PDP-11 finally began shipping. Unlike the Nova's simple instruction set architecture, the PDP-11 offered a much richer instruction set architecture. Continuous advancements in IC design and improvements in price-performance ratios gradually diminished the value of the original simplified instruction set. Consequently, Seligman was tasked with a new machine design that would be compatible with the Nova while providing a richer environment. This design was released as the Data General Eclipse series, which could add instruction sets for scientific or data processing tasks. The Eclipse series competed successfully with the PDP-11.

Around that time, rumors began circulating at DEC about a new 32-bit machine. DG decided it needed to release a similar product to compete, and Gruner was assigned to this task. This project was named the Fountainhead project, and due to its vast scope, all work was decided to be conducted externally. Gruner chose Research Triangle Park in North Carolina, and while the design became very complex, it was ultimately canceled years later.

Throughout all these efforts, work continued steadily on the Nova line.

In 1973, Data General released the Nova 840. This model represented a significant upgrade over previous models. A page memory system was introduced, allowing for up to 17-bit addressing, which supported 128 kwords of memory. However, installing this amount of memory required considerable space. As a result, the 840 was shipped in a 14-slot case, which was much larger than previous models. This model made significant advancements in memory management and expandability.

Nova 2 (1973)

Released in 1973, the Nova 2 represented another evolution of the Nova series. With increased integration, the CPU became smaller, and the complexity of previous models was significantly simplified. The Nova 2 could integrate all components onto a single board, eliminating the need for multiple boards like earlier models. The boot code was stored in ROM, and activating the "program load" switch loaded that code into core memory. The Nova 2 had various slot options, including models with 2/4, 2/7, and 2/10 slots.

Nova 3 (1975)

The Nova 3, released in 1975, marked another significant improvement. This model featured two additional registers to manage access to the built-in stack. Additionally, the processor was redesigned using TTL components, greatly enhancing system performance. The Nova 3 was available in Nova 3/4 (4-slot) and Nova 3/12 (12-slot) versions.

Nova 4 (1978)

Initially, Data General planned for the Nova 3 to be the last model, but strong demand led to the release of the Nova 4 in 1978. The Nova 4 was designed based on the AMD Am2901 bit-slice ALU and was intended for dual use from the start, serving both as a Nova 4 and an Eclipse S/140. This model offered dual functionality, providing much greater flexibility. An optional floating-point coprocessor was available, and memory mapping allowed for expansion up to 128 kwords.

The Nova 4 was divided into Nova 4/C (integrated memory model), Nova 4/S (separate memory model), and Nova 4/X (memory management unit (MMU) enabled model). The 4/X model supported 128 kwords of memory, while the 4/S model did not have the MMU enabled but included a prefetcher that could prefetch up to 11 instructions, enhancing performance.

microNOVA (1977-1979)

Data General also produced a series of single-chip implementations of the Nova processor called microNOVA. The first chip in this series, mN601, was released in 1977 and designed to fit a 40-pin dual in-line package (DIP). This design required two cycles for memory reads/writes, resulting in a speed that was half that of the original Nova. The mN601 was sold both as a CPU for other manufacturers and as a complete system, which included a system with 4KB of RAM.

In 1979, the mN602 was released, integrating the entire chipset into a single VLSI chip, further reducing physical size. It was used in systems like the microNOVA MP/100 and microNOVA MP/200, which were scaled-down versions of the Nova.

Later, the microNOVA was repackaged into a PC-style case with a monitor and two floppy disks as a system called Enterprise. This system was released in 1981 and ran the RDOS operating system. However, with the launch of the IBM PC in 1981, the microNOVA failed to gain significant attention in the market and faded away.

The Nova series had a significant impact on the computer world. Its architecture influenced the design of several important systems, such as the Xerox Alto (1973) and Apple I (1976). Additionally, its architecture formed the basis for the Computervision CGP series, and the design of the Nova is said to have inspired the front panel of the MITS Altair (1975) microcomputer.

Building on the success of the Nova, Data General developed the Eclipse series, which offered an extended instruction set and backward compatibility. Later, it expanded to a 32-bit architecture through the MV series, competing with DEC's VAX systems. The development of the MV series was covered in Tracy Kidder's popular book, "The Soul of a New Machine."

Ultimately, Data General evolved into a company providing servers and storage devices based on Intel processors and was eventually acquired by EMC. However, the legacy of the Nova lives on thanks to a passionate community dedicated to preserving and celebrating 16-bit systems, who continue to commemorate its historical significance.